1. Field of the Invention
This invention relates generally to the fabrication of semiconductor devices such as a "leads over chip" (LOC) die assembly. More specifically, the invention pertains to a method and apparatus for reducing the stress resulting from the lodging of filler particles present in plastic encapsulants between the undersides of the lead frame leads and the active surface of the die, an integrated circuit semiconductor device, in a die assembly encapsulated in plastic.
2. State of the Art
The use of LOC semiconductor die assemblies has become relatively common in the industry. This style or configuration of semiconductor device replaces a "traditional" lead frame with a central, integral support (commonly called a die-attach tab, paddle or island) to which the back surface of a semiconductor die is secured, with a lead frame arrangement wherein the dedicated die-attach support is eliminated and at least some of the leads extend over the active surface of the die. The die is then adhered to the lead extensions with an adhesive dielectric layer of some sort disposed between the undersides of the lead extensions and the die. Early examples of LOC assemblies are illustrated in U.S. Pat. No. 4,862,245 to Pashby et al. and U.S. Pat. No. 4,984,059 to Kubota et al. More recent examples of the implementation of LOC technology are disclosed in U.S. Pat. Nos. 5,068,712; 5,184,208; 5,233,220; 5,252,853; 5,277,661; 5,286,679; 5,304,842; 5,418,189; 5,461,255; 5,466,888; 5,545,921; and 5,576,246. In instances known to the inventors, LOC assemblies employ large quantities or horizontal cross-sectional areas of adhesive to enhance physical support of the die for handling.
Traditional lead frame die assemblies using a die-attach tab place the inner ends of the lead frame leads in close lateral proximity to the periphery of the active die surface where the bond pads are located, wire bonds then being formed between the lead ends and the bond pads. LOC die assemblies, by their extension of inner lead ends over the die, permit physical support of the die from the leads themselves as well as more diverse (including centralized) placement of the bond pads on the active surface, as well as the use of the leads for heat transfer from the die.
However, use of LOC die assemblies in combination with plastic packaging of the LOC die assembly, as known in the art, has demonstrated some shortcomings of LOC technology as presently practiced in the art.
By far the most common manner of forming a plastic package about a die assembly is molding, and specifically transfer molding. In this process (and with specific reference to LOC die assemblies), a semiconductor die is suspended by its active surface from the underside of inner lead extensions of a lead frame (typically Cu or Alloy 42) by a tape, screen print or spin-on dielectric adhesive layer. The bond pads of the die and the inner lead ends of the frame are then electrically connected by wire bonds (typically Au, although Al and other metal alloy wires have also been employed) by means known in the art. The resulting LOC die assembly, which may comprise the framework of a dualin-line package (DIP), zig-zag in-line package (ZIP), small outline j-lead package (SOJ), quad flat pack (QFP), plastic leaded chip carrier (PLCC), surface mount device (SMD) or other plastic package configuration known in the art, is placed in a mold cavity and encapsulated in a thermosetting polymer which, when heated, reacts irreversibly to form a highly cross-linked matrix no longer capable of being re-melted.
The thermosetting polymer generally is comprised of three major components: an epoxy resin, a hardener including (accelerators), and a filler material. Other additives such as flame retardants, mold release agents and colorants are also employed in relatively small amounts. While many variations of the three major components are known in the art, the focus of the present invention resides in the filler materials employed in the thermosetting polymer and their effects on the active die surface.
Filler materials are usually a form of fused silica, although other materials such as calcium carbonates, calcium silicates, talc, mica and clays have been employed for less rigorous applications. Powdered fused quartz is currently the primary filler used in encapsulants. Each of the above filler materials is a relatively hard material, particularly when compared to the die surface.
Fillers provide a number of advantages in comparison to unfilled encapsulants. For example, fillers reinforce the polymer and thus provide additional package strength, enhance thermal conductivity of the package, provide enhanced resistance to thermal shock, and greatly reduce the cost of the encapsulating material in comparison to unfilled polymer. Fillers also beneficially reduce the coefficient of thermal expansion (CTE) of the composite material by about fifty percent in comparison to the unfilled polymer, resulting in a CTE much closer to that of the silicon or gallium arsenide die. Filler materials, however, also present some recognized disadvantages, including increasing the stiffness of the plastic package and the moisture permeability of the package.
One previously unrecognized disadvantage discovered by the inventors herein is damage to the active die surface resulting from encapsulant filler particles becoming lodged or wedged between the underside of the lead extensions and the active die surface during transfer molding of the plastic package about the die and the inner lead ends of the LOC die assembly. The filler particles, which may literally be jammed in position due to deleterious polymer flow patterns and flow imbalances in the mold cavity during encapsulation, place the active die surface under residual stress at the points of contact of the particles. The hard particles may then damage the die surface or conductive elements thereon or immediately thereunder when the package is further stressed (mechanically, thermally, electrically) during post-encapsulation handling and testing.
While it is possible to employ a lower volume of filler in the encapsulating polymer to reduce potential for filler particle lodging or wedging, a drastic reduction in filler volume raises costs of the polymer to unacceptable levels. Currently available filler technology also imposes certain limitations as to practical beneficial reductions in particle size (currently in the 75 to 125 micron range, with the larger end of the range being easier to achieve with consistency) and in the shape of the filler particles. While it is desirable that particles be of generally spherical shape, it has thus far proven impossible to eliminate non-spherical flakes or chips which, in the wrong orientation, maximize stress on the die surface.
Ongoing advances in design and manufacturing technology provide increasingly thinner conductive, semiconductive and dielectric layers in state-of-the-art dice, and the width and pitch of conductors serving various purposes on the active surface of the die are likewise being continually reduced. The resulting die structures, while robust and reliable for their intended uses, nonetheless become more stress-susceptible due to the minimal strength provided by the minute widths, depths and spacings of their constituent elements. The integrity of active surface die coats such as silicon dioxide, doped silicon dioxides such as phosphorous silicate glass (PSG) or borophosphorous silicate glass (BPSG), or silicon nitride, may thus be compromised by point stresses applied by filler particles, the result being unanticipated shortening of device life if not immediate, detectable damage or alteration of performance characteristics.
The aforementioned U.S. Pat. No. 4,984,059 to Kubota et al. does incidentally disclose several exemplary LOC arrangements which appear to greatly space the leads over the chip or which do not appear to provide significant areas for filler particle lodging. However, such structures may create fabrication and lead spacing and positioning difficulties.
U.S. Pat. No. 5,436,410 to Jain et al. discloses methods for suppressing stress-induced defects in semiconductor leads. The specific problems addressed by Jain et al. do not include damage to the die by filler material particles, and their solution to lead damage is to provide a stress-reducing layer over the leads.
To the inventor's knowledge, those of ordinary skill in the art have failed to recognize the particular stress phenomenon attendant to transfer molding and the use of filled encapsulants, nor has the current state of the art provided a LOC structure which beneficially accommodates this phenomenon.